Introduction to Verilog

 Ok, I'd like to start giving Verilog lessons on the list.

As this goes along, we can clear up questions people have and turn them into formal lessons on the wiki.

Perhaps we can turn this into a book under Creative Commons and perhaps sell a dead tree version for
fund-raising. But I'm getting ahead of myself. :)

I'd hate to bias this too much towards the semantics of Verilog, but it's kinda hard to avoid it.

What matters is the semantics of the hardware and how to get that to happen given the particular language.
VHDL also translates into hardware, so although some of the semantics are different,

they aren't at all alien. So what I want to do is teach HDL-based digital circuit design,

using Verilog as a means of ｅxpression.

                                                              - Tim Miller 2006-06-14

lesson 1 : signals